回忆往事500z(一)
3D7323
MONOLITHIC TRIPLE
FIXED DELAY LINE (SERIES 3D7323)
FEATURES
PACKAGES
• • • • • • • • • • •
•
All-silicon, low-power CMOS technology I1VDDVDD I111814TTL/CMOS compatible inputs and outputs
N/CI2O1 N/C22713Vapor phase, IR and wave solderable
O1 I3O2 I233612Auto-insertable (DIP pkg.)
N/CGNDO3 N/C44511Low ground bounce noise
Leading- and trailing-edge accuracy O2 I35103D7323M DIP Delay range: 6 through 6000ns 3D7323H Gull-Wing N/CN/C69Delay tolerance: 2% or 1.0ns VDD I118O3 GND78
O1 I227Temperature stability: ±3% typ (-40C to 85C) O2 I336
3D7323 DIP O3 GND45Vdd stability: ±1% typical (4.75V to 5.25V)
3D7323G Gull-Wing
Minimum input pulse width: 20% of total 3D7323Z SOIC3D7323K Unused pins delay (150 Mil) removed 14-pin DIP available as drop-in replacement for
hybrid delay lines
FUNCTIONAL DESCRIPTION PIN DESCRIPTIONS
I1 Delay Line 1 Input The 3D7323 Triple Delay Line product family consists of fixed-delay
I2 Delay Line 2 Input CMOS integrated circuits. Each package contains three matched,
I3 Delay Line 3 Input independent delay lines. Delay values can range from 6ns through
O1 Delay Line 1 Output 6000ns. The input is reproduced at the output without inversion,
O2 Delay Line 2 Output shifted in time as per the user-specified dash number. The 3D7323
O3 Delay Line 3 Output is TTL- and CMOS-compatible, capable of driving ten 74LS-type
VDD +5 Volts loads, and features both rising- and falling-edge accuracy.
GND Ground
N/C No Connection The all-CMOS 3D7323 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL fixed delay lines. It is
offered in a standard 8-pin auto-insertable DIP and a space saving surface mount 8-pin SOIC.
PART NUMBER DELAY
DIP-8 SOIC-8 DIP-14 DIP-14 PER LINE 3D7323M 3D7323Z 3D7323 3D7323K (ns) 3D7323H 3D7323G
6 ± 1.0 8 ± 1.0 10 ± 1.0 15 ± 1.0 20 ± 1.0 25 ± 1.0 30 ± 1.0 40 ± 1.0 50 ± 1.0 100 ± 2.0 200 ± 4.0 500 ± 10.0 1000 ± 20 6000 ±120
Max Operating
Frequency
55.5 MHz 41.6 MHz 33.3 MHz 22.2 MHz 16.7 MHz 13.3 MHz 11.1 MHz 8.33 MHz 6.67 MHz 3.33 MHz 1.67 MHz 0.67 MHz 0.33 MHz 0.05 MHz
INPUT RESTRICTIONS
Absolute Max Min Operating Oper. Freq. Pulse Width
125.0 MHz 111.0 MHz 100.0 MHz 100.0 MHz 100.0 MHz 83.3 MHz 71.4 MHz 62.5 MHz 50.0 MHz 25.0 MHz 12.5 MHz 5.00 MHz 2.50 MHz 0.42 MHz
9.0 ns 12.0 ns 15.0 ns 22.5 ns 30.0 ns 37.5 ns 45.0 ns 60.0 ns 75.0 ns 150.0 ns 300.0 ns 750.0 ns 1500.0 ns 9000.0 ns
Absolute Min Oper. P.W.
4.0 ns 4.5 ns 5.0 ns 5.0 ns 5.0 ns 6.0 ns 7.0 ns 8.0 ns 10.0 ns 20.0 ns 40.0 ns 100.0 ns 200.0 ns 1200.0 ns
NOTE: Any delay between 10 and 6000 ns not shown is also available. 2006 Data Delay Devices
Doc #06015
5/10/2006
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
3D7323
APPLICATION NOTES
OPERATIONAL DESCRIPTION
The 3D7323 triple delay line architecture is
shown in Figure 1. The individual delay lines are composed of a number of delay cells connected in series. Each delay line produces at its output a replica of the signal present at its input, shifted in time. The delay lines are matched and share the same compensation signals, which minimizes line-to-line delay deviations over temperature and supply voltage variations.
INPUT SIGNAL CHARACTERISTICS
The Frequency and/or Pulse Width (high or low) of operation may adversely impact the specified delay accuracy of the particular device. The reasons for the dependency of the output delay accuracy on the input signal characteristics are varied and complex. Therefore a Maximum and an Absolute Maximum operating input
frequency and a Minimum and an Absolute Minimum operating pulse width have been specified.
To guarantee the Table 1 delay accuracy for input frequencies higher than the Maximum Operating Frequency, the 3D7323 must be tested at the user operating frequency.
Therefore, to facilitate production and device identification, the part number will include a custom reference designator identifying the intended frequency of operation. The
programmed delay accuracy of the device is guaranteed, therefore, only at the user specified input frequency. Small input frequency variation about the selected frequency will only marginally impact the programmed delay accuracy, if at all. Nevertheless, it is strongly recommended that the engineering staff at DATA DELAY DEVICES be consulted.
OPERATING PULSE WIDTH
The Absolute Minimum Operating Pulse Width (high or low) specification, tabulated in Table 1, determines the smallest Pulse Width of the delay line input signal that can be
reproduced, shifted in time at the device output, with acceptable pulse width distortion.
The Minimum Operating Pulse Width (high or low) specification determines the smallest Pulse Width of the delay line input signal for which the output delay accuracy tabulated in Table 1 is guaranteed.
To guarantee the Table 1 delay accuracy for input pulse width smaller than the Minimum Operating Pulse Width, the 3D7323 must be tested at the user operating pulse width. Therefore, to facilitate production and device identification, the part number will include a
O2
O3
OPERATING FREQUENCY
The Absolute Maximum Operating Frequency specification, tabulated in Table 1, determines the highest frequency of the delay line input signal that can be reproduced, shifted in time at the device output, with acceptable duty cycle distortion.
The Maximum Operating Frequency
specification determines the highest frequency of the delay line input signal for which the output delay accuracy is guaranteed.
VDD
O1
Temp & VDD CompensatioDelay Delay Delay
GND I1I2I3
Figure 1: 3D7323 Functional Diagram
Doc #06015
5/10/2006
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672
2
3D7323
APPLICATION NOTES (CONT’D)
custom reference designator identifying the intended frequency and duty cycle of operation. The programmed delay accuracy of the device is guaranteed, therefore, only for the user specified input characteristics. Small input pulse width variation about the selected pulse width will only marginally impact the programmed delay
accuracy, if at all. Nevertheless, it is strongly recommended that the engineering staff at DATA DELAY DEVICES be consulted.
circuitry to minimize the delay variations induced by fluctuations in power supply and/or temperature.
The thermal coefficient is reduced to 300
PPM/C, which is equivalent to a variation , over the -40C to 85C operating range, of ±3% from the room-temperature delay settings and/or 1.0ns, whichever is greater. The power supply coefficient is reduced, over the 4.75V to 5.25V operating range, to ±1% of the delay settings at the nominal 5.0VDC power supply and/or 2.0ns, whichever is greater. It is essential that the power supply pin be adequately bypassed and filtered. In addition, the power bus should be of as low an impedance
construction as possible. Power planes are preferred.
POWER SUPPLY AND
TEMPERATURE CONSIDERATIONS
The delay of CMOS integrated circuits is strongly dependent on power supply and temperature. The monolithic 3D7323 programmable delay line utilizes novel and innovative compensation
DEVICE SPECIFICATIONS
TABLE 2: ABSOLUTE MAXIMUM RATINGS
DC Supply Voltage VInput Pin Voltage VINVDD Input Pin Current IStorage Temperature TSTRGLead Temperature T
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(-40C to 85C, 4.75V to 5.25V)
Static Supply Current* IDDHigh Level Input Voltage VLow Level Input Voltage VILHigh Level Input Current IIHVIH = VDD µA Low Level Input Current IILVIL = 0V µA High Level Output Current IOHVDD = 4.75V
V = 2.4V
Low Level Output Current IOLVDD = 4.75V
V = 0.4V
Output Rise & Fall Time TR & TFCLD = 5 pf
*IDD(Dynamic) = 3 * CLD * VDD * F
where: CLD = Average capacitance load/line (pf) F = Input frequency (GHz)
Input Capacitance = 10 pf typical
Output Load Capacitance (CLD) = 25 pf max
Doc #06015
5/10/2006
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
3D7323
SILICON DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT: OUTPUT:
oo
Ambient Temperature: 25C ± 3C Rload: 10KΩ ± 10%
± 10% Supply Voltage (Vcc): 5.0V ± 0.1V Cload: 5pf
Input Pulse: High = 3.0V ± 0.1V Threshold: 1.5V (Rising & Falling) Low = 0.0V ± 0.1V Source Impedance: 50Ω Max. Rise/Fall Time: 3.0 ns Max. (measured
DeviceDigital between 0.6V and 2.4V ) 10KΩUnderScopePulse Width: PWIN = 1.25 x Total Delay
TestPeriod: PERIN = 2.5 x Total Delay
5pf
470Ω
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
Figure 2: Test Setup
PERIN
PWIN
tRISE
INPUTSIGNAL
2.4V1.5V0.6V
tFALL
VIH
2.4V1.5V0.6V
VIL
tPHL
tPLH
OUTPUTSIGNAL
1.5V
VOH
1.5V
VOL
Figure 3: Timing Diagram
Doc #06015
5/10/2006
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672
4
回忆往事500z(二)
雪
暖国的雨，向来没有变过冰冷的坚硬的灿烂的雪花。博识的人们觉得他单调，他自己也以为不幸否耶？江南的雪，可是滋润美艳之至了；那是还在隐约着的青春的消息，是极壮健的处子的皮肤。雪野中有血红的宝珠山茶，白中隐青的单瓣梅花，深黄的磬口的蜡梅花；雪下面还有冷绿的杂草。蝴蝶确乎没有；蜜蜂是否来采山茶花和梅花的蜜，我可记不真切了。但我的眼前仿佛看见冬花开在雪野中，有许多蜜蜂们忙碌地飞着，也听得他们嗡嗡地闹着。
孩子们呵着冻得通红，像紫芽姜一般的小手，七八个一齐来塑雪罗汉。因为不成功，谁的父亲也来帮忙了。罗汉就塑得比孩子们高得多，虽然不过是上小下大的一堆，终于分不清是壶卢还是罗汉；然而很洁白，很明艳，以自身的滋润相粘结，整个地闪闪地生光。孩子们用龙眼核给他做眼珠，又从谁的母亲的脂粉奁中偷得胭脂来涂在嘴唇上。这回确是一个大阿罗汉了。他也就目光灼灼地嘴唇通红地坐在雪地里。
第二天还有几个孩子来访问他；对了他拍手，点头，嘻笑。但他终于独自坐着了。晴天又来消释他的皮肤，寒夜又使他结一层冰，化作不适明的水晶模样；边续的晴天又使他成为不知道算什么，而嘴上的胭脂也褪尽了。
但是，朔方的雪花在纷飞之后，却永远如粉，如沙，他们决不粘连，撤在屋上，地上，枯草上，就是这样。屋上的雪是阜已就有悄化了的，因为屋里居人的火的温热。别的，在晴天之下，旋风忽来，便蓬勃地奋飞，在日光中灿灿地生光，如包藏火焰的大雾，旋转而且升腾，弥漫太空；使太空旋转而且升腾地闪烁。
在无边的旷野上，在凛冽的天宇下，闪闪地旋转升腾着的是雨的精魂……
向人生的高处飞翔
有一块石头在深山里寂寞地躺了很久，它有一个梦想：有一天能够像鸟儿一样飞上天空。当它把自己的理想告诉同伴时，立刻招来同伴们的嘲笑："瞧瞧，什么叫心比天高，这就是啊!""真是异想天开!"……这块石头不去理会同伴们的闲言碎语，仍然怀抱理想等待时机。有一天一个叫庄子的人路过这里，它知道这个人有非凡的智慧，就把自己的理想对庄子说了，庄子说："我可以帮你实现理想，但你必须先长成一座大山，这可是要吃不少苦的。"石头说："我不怕吃苦。"于是石头拼命地吸取天地灵气、自然精华，承接雨露惠泽，拼命生长，不知经过了多少年，受了多少风雨的洗礼，它终于长成了一座大山。 于是，庄子招来大鹏以翅膀击山，一时间天摇地动，一声惊天动地的巨响后，山炸开了，无数石头飞向天空，在飞的一刹那，石头会心地笑了，它终于体会到飞翔的快乐。但是不久它就从空中摔下来，仍变成当初的模样，落在原来的地方。庄子问它："你后悔吗?""不，我不后悔，我长成过一座山，而且我飞翔过!"石头说。
其实人的一生就像石头一样，最初的开始和最终的结局都是一样的，但同生为石，有的石头胸怀飞翔的梦，同生为人，有人却有凌云之志。
为什么我们不能像那块石头一样拥有飞翔之志?一个人的目标定得高，他就必须付出更多的辛劳和汗水，即使经过全力打拼不能实现目标，至少也比目标定得低的人走得远、实现得多。林肯总结自己一生的经历得出这样的结论：自然界里的喷泉的高度不会超过它的源头，一个人最终能取得的成就不会超过他的信念。我们的先辈在经历或目睹了太多的翱翔或匍匐之后，意味深长地告诉我们这样的人生哲理!取法乎上，仅得其中；取法乎中，仅得其下；取法乎下，一无所得。
志存高远吧!壮志凌云吧!让我们拥有一个值得一生为之拼搏的高远志向吧!不在蓬蒿间低低飞舞，敢上青天与鲲鹏比翼，摈弃燕雀屋檐下的廉价欢悦，勇敢地飞上高空接受风雨雷电的洗礼。为理想拼搏，向人生的高空展翅飞翔。
理想与自信
选择自信，就是选择豁达坦然，就是选择在名利面前岿然不动，就是选择在势力面前昂首挺胸，撑开自信的帆破流向前，展示破搏击的风采。
信念的力量在于即使身处逆境，亦能帮助你鼓起前进的船帆；信念的魅力在于即使遇到险运，亦能召唤你鼓起生活的勇气；信念的伟大在于即使遇到不幸，亦能促使你保持崇高的心灵。
耐力，是一种不显山露水的执着；是一种不惧风不畏雨的坚忍；是一种不图名不图利的忠诚。
大厦巍然屹立，是因为有坚强的支柱，理想和信念就是人生大厦的支柱；船舱破浪前行，是因为有指示方向的罗盘，理想和信仰就是人生航船的罗盘；列车奔驰千里，是因为有引导它的铁轨，理想和信念就是人生列车上的铁轨。
风雨过后，眼前会是鸥翔鱼游的天水一色。走出荆棘，前面就是铺满鲜花的康庄大道。登上山顶，脚下便是积翠如云的空蒙山色。在这个世界上，一星陨落，黯淡不了星空灿烂；一花凋零，荒芜不了整个春天。
信念之于人，犹翅膀之鸟，信念是飞翔的翅膀。
有了执著，生命旅程上的寂寞可以铺成一片蓝天；有了执著，孤单可以演绎成一排鸿雁；有了执著，欢乐可以绽放成满园的鲜花。
在浩瀚的大海航行，迷失方向，水手将葬身海底；在茫茫的隔壁中跋涉，迷失方向，旅着将暴尸荒野；在无边的探索中寻找希望之光，迷失方向，你将会与成功擦肩而过，抱憾终生。
只有启程，才会到达理想和目的地，只有拼搏，才会获得辉煌的成功，只有播种，才会有收获。只有追求，才会品位堂堂正正的人生。
猫狗
有一只猫，它总是流浪。它曾经住在一位老人家里，老人仔细地照顾它。它也曾经住过一个女孩家，女孩认真地陪伴着它。可它还是离开了，它不喜欢他们。
它只喜欢狗。
狗总是把主人给的骨头带给猫吃，狗总是带猫到自己喜欢的小花园散步，狗总是带猫偷偷回主人家取暖，狗总是告诉自己的狗同伴们不要伤害猫，毕竟猫没有家。
猫长大了，它学会了捕鼠。它抱着自己捕到的第一只鼠送给狗。狗高兴地把鼠带回家给主人看，而狗的主人却凶巴巴地喊：“走开！脏死了！把鼠带走，否则你不要回来！” 狗悻悻地带鼠离开，遇到猫。
“你不喜欢它吗？”猫指着鼠问狗。
狗不懂猫在说什么，狗以为猫在问：“你的主人不喜欢它吗？”于是狗点了点头。 猫有一点失落，又问：“那你也不喜欢我吗？”
狗还是敷衍地点了点头。
猫转身离开。
狗在想：“我点头猫会离开，或许我该摇头才对。”狗上前拦住猫。
猫问：“你希望我留下来吗？”
狗摇头。狗不懂猫语。
猫离开了。猫哭了。猫想起养过它的那个女孩说过：“当猫真好，可以去很高很高的地方哭泣，没有谁会看到